From 951b1c1c8f11acc0f9a4e7b915d8a611dfb43f07 Mon Sep 17 00:00:00 2001 From: "user@node5.net" Date: Sat, 6 Sep 2025 21:19:14 +0200 Subject: VFD - Add chip photos, Alternative input method & cleanup --- VFD clock/2025-08-17-19-15-38-708.webp | Bin 0 -> 81680 bytes VFD clock/2025-08-17-19-15-47-182.webp | Bin 0 -> 95920 bytes VFD clock/2025-08-17-19-15-57-696.webp | Bin 0 -> 103102 bytes VFD clock/2025-08-17-19-16-17-416.webp | Bin 0 -> 97944 bytes VFD clock/index.md | 23 ++++++++++++++++++++++- 5 files changed, 22 insertions(+), 1 deletion(-) create mode 100644 VFD clock/2025-08-17-19-15-38-708.webp create mode 100644 VFD clock/2025-08-17-19-15-47-182.webp create mode 100644 VFD clock/2025-08-17-19-15-57-696.webp create mode 100644 VFD clock/2025-08-17-19-16-17-416.webp diff --git a/VFD clock/2025-08-17-19-15-38-708.webp b/VFD clock/2025-08-17-19-15-38-708.webp new file mode 100644 index 0000000..e1fb8b2 Binary files /dev/null and b/VFD clock/2025-08-17-19-15-38-708.webp differ diff --git a/VFD clock/2025-08-17-19-15-47-182.webp b/VFD clock/2025-08-17-19-15-47-182.webp new file mode 100644 index 0000000..0ff98f9 Binary files /dev/null and b/VFD clock/2025-08-17-19-15-47-182.webp differ diff --git a/VFD clock/2025-08-17-19-15-57-696.webp b/VFD clock/2025-08-17-19-15-57-696.webp new file mode 100644 index 0000000..8e053b6 Binary files /dev/null and b/VFD clock/2025-08-17-19-15-57-696.webp differ diff --git a/VFD clock/2025-08-17-19-16-17-416.webp b/VFD clock/2025-08-17-19-16-17-416.webp new file mode 100644 index 0000000..d68b287 Binary files /dev/null and b/VFD clock/2025-08-17-19-16-17-416.webp differ diff --git a/VFD clock/index.md b/VFD clock/index.md index 09626b3..72e9638 100644 --- a/VFD clock/index.md +++ b/VFD clock/index.md @@ -27,11 +27,25 @@ Which convents the ESPs from 3.3v logic -> -15 to 15 volt. ![](modules.webp) ![](modules%20top.webp) ![](rj45.webp) +![](2025-08-17-19-15-38-708.webp) +![](2025-08-17-19-15-47-182.webp) +![](2025-08-17-19-15-57-696.webp) +![](2025-08-17-19-16-17-416.webp) -![](circuit_image.svg) +--- + +## Circuit diagram [Link to circuit diagram - cirkitdesigner.com](https://app.cirkitdesigner.com/project/05cf3635-211d-451e-8c80-614e9fb4ede3) +![](circuit_image.svg) + +--- + +## Code + + [Link to code git repo](https://git.node5.net/firmware/vfd/) + ```cpp #include #include @@ -85,3 +99,10 @@ void loop() { events(); // Needed to update time continuously } ``` + +--- + +## Alternative input method + +It's been suggested to me that one could possibly forgo the TTL to RS232 converter chip, +since the VFD probably contains an RS232 to TTL convenrter anyways, worth exploring for another iteration. -- cgit 1.4.1